Cédric Courtaud
R&D Engineer @ Scaleway
About Research Publications

About Me

I am a researcher in computer science. I am currently working as a research engineer at Scaleway. From 2021 to 2024, I worked as a postdoctoral researcher at the Max Planck Institute for Software Systems (MPI-SWS) in the Real-Time Systems group lead by Björn B. Brandenburg. From 2016 to 2020, I was a PhD student sharing my time between Sorbonne Université (Paris, France) and Thales (Palaiseau, France). I obtained my PhD from Sorbonne Université in january 2020. My PhD work was advised by Gilles Muller (Inria), Julien Sopena (Sorbonne Université), and Daniel Gracia Pérez (Thales Research and Technology).

Research Interest

I have diverse research interests including operating systems, real-time systems, and multi-core architectures. My research essentially revolves around the practical aspects of real-time systems.

During my PhD, I worked on the problem of memory interference in multi-core processors. Memory interference occurs when several applications running in parallel on the same hardware platform contend for memory system hardware components. Such components include shared caches, memory controllers, buses or DRAM banks. Memory interference is a serious obstacle to the adoption of cheap multi-core hardware platforms for real-time systems, as they are causing significant and hard-to-predict delays to co-running applications. As part of my PhD, I developed some tools and microbenchmarks to study and predict the impact of memory interference on applications runtime depending on their memory usage patterns.

At MPI-SWS, I worked at making operating systems easier to reason about. My main contributions are the G(IP)^2C protocol – a micro-kernel IPC protocol with bounded delays – and LiME – a real-time task model extractor for Linux.

Since 2024, I am working in the industry, still contributing at building systems.

Publications

Conference papers

Björn B. Brandenburg, Cédric Courtaud, Filip Marković, Bite Ye LiME: The Linux Real-Time Task Model Extractor. IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS). 2025
Cédric Courtaud, Björn B. Brandenburg G(IP)^2C: Temporally isolated multiprocessor real-Time IPC with server-to-server invocations. IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS). 2023 (Best Paper Award)
Cédric Courtaud, Julien Sopena, Gilles Muller, Daniel Gracia Pérez Improving prediction accuracy of memory interferences for multicore platforms. IEEE Real-Time Systems Symposium (RTSS). 2019
Antoine Blin, Cédric Courtaud, Julien Sopena, Julia Lawall, Gille Muller Understanding the memory consumption of the MiBench embedded benchmark. International Conference on Networked Systems (Netys). 2016
Antoine Blin, Cédric Courtaud, Julien Sopena, Julia Lawall, Gille Muller Maximizing parallelism without exploding deadlines in a mixed criticality embedded system. Euromicro Conference on Real-Time Systems (ECRTS). 2016

Patent

Cédric Courtaud, Xavier Jean, Madeleing Faugere, Gilles Muller, Julien Sopena, Julia Lawall Method for controlling a multi-core processor and associated computer. US Patent App. 16/473,190. 2016

PhD Thesis

Cédric Courtaud Caractérisation de la sensibilité aux interférences mémoire dans les systèmes temps-réels embarqués sur des plateformes multi-coeurs. . 2020